PCIe FPGA Card
Xilinx UltraScale+ 3/4-Length PCIe Board
4x 100GbE and up to 512GB DDR4
BittWare’s XUP-P3R is a 3/4-length PCIe x16 card based on the Xilinx Virtex UltraScale+ FPGA. The UltraScale+ devices deliver high-performance, high-bandwidth, and reduced latency for systems demanding massive data flow and packet processing. The board offers extensive memory configurations supporting up to 512 GBytes of memory, sophisticated clocking and timing options, and four front panel QSFP cages, each supporting up to 100 Gbps (4×25) – including 100GbE.
The XUP-P3R also incorporates a Board Management Controller (BMC) for advanced system monitoring, which greatly simplifies platform integration and management. All of these features combine to make the XUP-P3R ideal for a wide range of data center applications, including network processing and security, acceleration, storage, broadcast, and SigInt.
4x 100GbE via 4 QSFP28
Up to 512 GBytes DDR4
Up to VU9P: 2.5 million LCs FPGA by Xilinx
BittWare's exclusive SEP (serial expansion port) allows the XUP-P3R to be expanded for an additional PCIe Gen3 x16 slot, additional 4 QSFPs, or connection between two XUP-P3Rs.
8x 12G-SDI video
This add-on card has several SFP cages which are electrically designed for SDI SFP Video modules. This allowed the customer to quickly build a proof-of-concept appliance for capturing video to the large VU9P FPGA.
Additional PCIe x16 interface
Many FPGAs have more PCIe connectivity than is possible with the main card’s edge fingers, so in this case an additional slot brings a second PCIe Gen3 x16 interface.
Additional 4x QSFP28
For some customers, adding proprietary interfaces is a critical design component. We designed the daughtercard to quickly get the customer to
Active and Passive Cooling Options
In addition to standard active fan and heatsink cooling, the XUPP3R offers two passive options, standard and our new advanced passive cooling using heat pipes.
Want More Details?
Request the Hardware Reference Guide (HRG)
The HRG gives you much more detail about the card such as block diagrams, tables and descriptions.
- Virtex UltraScale+
- Core speed grade - 2
- Contact BittWare for additional FPGA options
- Flash memory for booting FPGA
- 4 DIMM sites, each supporting*:
- Up to 128 GBytes DDR4 x72 with ECC
- Up to 576 Mbits dual QDR-II+ x18 (2 independent 288 Mbit banks)
- x16 Gen3 interface direct to FPGA
- Micro USB: (USB 2.0) for debug and programming FPGA and Flash
Serial expansion port (SEP)
- Expansion interface to FPGA via 20x GTY transceivers (optional; requires second slot)
- 14x GPIO signals to the FPGA
- 4 QSFP28 (zQSFP) cages on front panel connected directly to FPGA via 16 transceivers
- Each supports 100GbE, 40GbE, 4x 25GbE, or 4x 10GbE and can be combined for 400GbE
Board Management Controller
- Voltage, current, temperature monitoring
- Power sequencing and reset
- Field upgrades
- FPGA configuration and control
- Clock configuration
- I2C bus access
- USB 2.0
- Voltage overrides
- Standard: double-width active fan and heatsink
- Optional: double-width passive heatsink
- Optional: double-width advanced passive cooling with heatpipes
- On-board power derived from 12V PCIe slot & an AUX connector (6-pin)
- Power dissipation is application dependent
- Operating temperature 5°C to 35°C
- 3/4-length, standard-height PCIe dual-slot board
- 9.4 x 4.37 inches
- BittWorks II Toolkit - host, command, and debug tools for BittWare hardware
- Xilinx Vivado® Design Suite
- OpenCL - Xilinx SDAccel Development Environment, SDAccel Platform Release and pre-built examples for XUP-P3R
- FPGA Examples - example Vivado projects
Need to capture or record at 100G?
We offer PCIe Data Capture and Recorder reference designs for the XUP-P3R. Learn more about 100G Data Capture with our white paper and download the detailed App Note describing its operation.
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